Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic devices. As the demand for shrinking electronic devices has grown, a need for smaller and more creative packaging techniques of semiconductor dies has emerged. Thus, packages such as wafer level packaging (WLP) have begun to be developed, in which integrated circuits (ICs) are placed on a carrier having connectors for making connection to the ICs and other electrical components. In an attempt to further increase circuit density, three-dimensional (3D) ICs have also been developed, in which multiple ICs are bonded together electrical connections are formed between the dies and contact pads on a substrate. These relatively new types of packaging for semiconductors face manufacturing challenges such as poor adhesion between the IC and carriers, sidewall chipping, warpage, die shifting, and other reliability issues.